Digital bus noise suppression
US10476630B2 · kind B2 · utility
1Cited by
3References
31Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 8, 2018 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Feb 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03828
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A data bus interface may include a history buffer and a serializer. The history buffer may store bits representing a history of data recently transmitted on the data bus. The serializer may be configured to modify an input bit sequence containing original bits by interspersing padding bits with the original bits to suppress noise at one or more target frequencies. The serializer may output the modified input bit sequence on the data bus. Each padding bit of the plurality of padding bits may be generated based on values of at least two bits stored in the history buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.