Patent · US Active

Device and method for supporting clock transfer of multiple clock domains

US10476657B2 · kind B2 · utility

0Cited by
10References
20Claims
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Assignee

Inventor

Key dates

Filing dateFeb 1, 2019
Grant dateNov 12, 2019
Priority date
Expiry dateFeb 1, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04J3/0697
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

A device and a method for supporting clock transfer of multiple clock domains, where the device includes N phase frequency detectors, N filters, N clock reconstructors, and N clock domain interfaces, where N is an integer greater than or equal to two, the N clock domain interfaces are in a one-to-one correspondence with the N phase frequency detectors, the N filters, and the N clock reconstructors, the N phase frequency detectors are respectively connected to N clock sources, and at least two clock sources of the N clock sources are different. The foregoing device flexibly adapt to multiple different clock domains, implement that a single device simultaneously supports clock transfer of multiple clock domains, and flexibly satisfy user demands without adding or replacing devices.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.