Methods, systems and computer readable media for wide bus pattern matching
US10476776B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2018 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | May 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for wide bus pattern matching includes, receiving, in a first clock cycle, a bus width of data from a data bus. The method further includes using pattern compare blocks to compare each n-bit portion of data from the data bus to a plurality of different n-bit pattern portions, n being an integer equal to a smallest boundary in which a pattern can start on the data bus. The method further includes detecting, using a plurality of diagonal detectors, matching pattern portions across the pattern compare blocks that are arranged in a diagonal. The method further includes detecting, using a packet boundary detector, when the matching pattern portions arranged in a diagonal indicate a matching pattern that falls within a set of packet boundaries. The method further includes indicating a positive match when the packet boundary detector indicates that the matching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.