Apparatuses, systems, and methods for performing hardware acceleration via dual-compact-form-factor expansion cards
US10477707B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2018 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Aug 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/142
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A disclosed expansion card may include a printed circuit board and a hardware accelerator. The hardware accelerator may be disposed on the printed circuit board and may include application-specific hardware circuitry designed to perform a computing task. The hardware accelerator may offload a portion of the computing task from a central processing unit of a computing device by executing, via the application-specific hardware circuitry, the portion of the computing task. The expansion card may also include an edge connector, disposed on a connecting edge of the printed circuit board, that may couple the hardware accelerator to the central processing unit via a computing bus. The edge connector may also include a primary pinout and a secondary pinout that may each conform to a compact pinout specification that may be more compact than a pinout specification defined for the computing bus. Various other systems and methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.