Semiconductor device and method for manufacturing same
US10483125B2 · kind B2 · utility
26Cited by
0References
8Claims
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Assignee
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Key dates
| Filing date | Aug 28, 2018 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Aug 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/522
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first interlayer film formed on an upper surface of a substrate, a first metal wiring line, a second interlayer film, a second metal wiring line, a first via electrically connecting the first metal wiring line and the second metal wiring line, a landing pad embedded in an upper portion of the first interlayer film and penetrating the second interlayer film, and a second via penetrating the substrate and the first interlayer film from a back side of the substrate and connected to the landing pad. The lower surface position of the landing pad is different from that of the first metal wiring line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.