Compensation of an arc curvature generated in a wafer
US10483188B2 · kind B2 · utility
1Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2016 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Dec 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/2007
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This method comprises the steps of: a) forming a set of first trenches on the first surface of the wafer; b) forming a set of second trenches on the second surface of the wafer, at least partially facing the first trenches; c) filling the first trenches with a first material having a CTE α1; d) filling the second trenches with a second material having a CTE α2, and verifying α2>α0 or α2<α0 depending on whether the first material verifies α1>α0 or α1<α0.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.