Patent · US Active

EEPROM device

US10483269B2 · kind B2 · utility

0Cited by
1References
6Claims
0Family size

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Inventors

Key dates

Filing dateAug 14, 2018
Grant dateNov 19, 2019
Priority date
Expiry dateAug 14, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a semiconductor substrate, a first dielectric layer having a first thickness on the semiconductor substrate, a first opening having a first width in the first dielectric layer, a second dielectric layer having a second thickness disposed in a middle region of the first opening, and a third dielectric layer having a first portion and a second portion disposed on opposite sides of second dielectric layer. The first portion and the second portion have a second width smaller than the first width, and the third dielectric layer has a third thickness smaller than the first thickness and the second thickness.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.