Three-dimensional semiconductor devices
US10483274B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2018 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Sep 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A three-dimensional semiconductor device includes an electrode structure on a substrate that includes a first region and a second region, the electrode structure including a ground selection electrode, cell electrodes, and a string selection electrode which are sequentially stacked on the substrate wherein the ground selection electrode, the cell electrodes, and the string selection electrode respectively include a ground selection pad, cell pads, and a string selection pad which define a stepped structure in the second region of the substrate, a plurality of dummy pillars penetrating each of the cell pads and a portion of the electrode structure under each of the cell pads, and a cell contact plug electrically connected to each of the cell pads, wherein each of the dummy pillars penetrates a boundary between adjacent cell pads, and wherein the adjacent cell pads share the dummy pillars.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.