Logic semiconductor device
US10483284B2 · kind B2 · utility
2Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2018 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Jan 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/975
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes stacked transistors. Each of the transistors includes a semiconductor column including a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductive region. A gate electrode is disposed to cover the intrinsic region, and a gate insulating layer is disposed between the gate electrode and the intrinsic region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.