Method and device for parallel polar code encoding/decoding
US10484130B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2017 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Sep 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/09
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments of this disclosure enhance the error detection performance of parallel polar encoding by cross-concatenating parity bits between segments of information bits transmitted over different sets of sub-channels. In one embodiment, a first segment of information bits is transmitted over a first set of sub-channels, and at least a second segment of information bits, and a masked parity bit, are transmitted over a second set of sub-channels. A value of the masked parity bit is equal to a bitwise combination of a first parity bit computed from the first segment of information bits and a second parity bit computed from the second segment of information bits. The bitwise combination may be a bitwise AND, a bitwise OR, or a bitwise XOR of the respective parity bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.