Gate driving circuit and display device
US10484655B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 30, 2016 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Aug 9, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0264
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a gate driving circuit and a display device, which solve the technical problem that the prior art is easy to cause abnormal output of gate driving signals. The gate driving circuit includes a precharge unit circuit, an output unit circuit, and a holding unit circuit. The output unit circuit includes a first reference point and a clock signal line. The holding unit circuit includes a second reference point and a holding signal line, and a holding capacitor is connected between the second reference point and the holding signal line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.