Patent · US Active

FPGA acceleration for serverless computing

US10489195B2 · kind B2 · utility

6Cited by
5References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 20, 2017
Grant dateNov 26, 2019
Priority date
Expiry dateJan 29, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/5088
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In one embodiment, a method for FPGA accelerated serverless computing comprises receiving, from a user, a definition of a serverless computing task comprising one or more functions to be executed. A task scheduler performs an initial placement of the serverless computing task to a first host determined to be a first optimal host for executing the serverless computing task. The task scheduler determines a supplemental placement of a first function to a second host determined to be a second optimal host for accelerating execution of the first function, wherein the first function is not able to accelerated by one or more FPGAs in the first host. The serverless computing task is executed on the first host and the second host according to the initial placement and the supplemental placement.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.