Reference column sensing for resistive memory
US10490270B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2015 |
| Grant date | Nov 26, 2019 |
| Priority date | — |
| Expiry date | Oct 28, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit includes a resistive memory cell in a memory array to store a memory state for the resistive memory cell. A reference cell in the memory array stores a reference memory state for the resistive memory cell. A function generator concurrently applies a read voltage to the resistive memory cell and the reference cell via a memory row address. A sensing circuit enables the function generator and monitors a target current received from the resistive memory cell when selected via a memory column address and monitors a reference current received when selected via a reference column address in response to the read voltage applied to the memory row address. A current comparator circuit in the sensing circuit compares a difference between the target current and the reference current to determine the memory state of the resistive memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.