Display device
US10490614B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2017 |
| Grant date | Nov 26, 2019 |
| Priority date | — |
| Expiry date | Oct 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/131
Abstract
A display device includes a thin film transistor, a gate insulting layer, an interlayer insulating layer, a data line, a spacer, and a pixel. The thin film transistor includes a semiconductor layer and a gate electrode. The semiconductor layer includes a source region and a drain region on respective sides of the channel region. The gate insulating layer is between the semiconductor layer and the gate electrode. The interlayer insulating layer covers the thin film transistor. The data line contacts the semiconductor layer via a hole passing through the gate insulating layer and the interlayer insulating layer. The spacer is on an inner wall of the hole and contacting the data line. The pixel electrode is electrically connected to the thin film transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.