Wide programmable gain receiver data path for single-ended memory interface application
US10496587B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2018 |
| Grant date | Dec 3, 2019 |
| Priority date | — |
| Expiry date | Jun 27, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes an interface and a plurality of impedance branches. The interface may be configured to receive a data signal and a plurality of selection signals. The plurality of impedance branches may comprise a group of branches and a separated branch. The plurality of impedance branches may be configured to adjust an impedance value and a gain of a data path for the data signal in response to the selection signals. The group of branches may be controlled in response to the selection signals to select the impedance value and a first gain value in a first mode. The separated branch may replace one of the plurality of impedance branches in the group of branches in response to the selection signals to select a second gain value in a second mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.