Circuitry for tracking bias voltage behavior
US10497414B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2018 |
| Grant date | Dec 3, 2019 |
| Priority date | — |
| Expiry date | Jun 8, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various implementations described herein refer to an integrated circuit having dummy wordline driver circuitry coupled to a dummy wordline and dummy bitline pulldown circuitry coupled between a dummy bitline and the dummy wordline. The integrated circuit may include dummy wordline tracking circuitry coupled to the dummy wordline between the dummy wordline driver circuitry and the dummy bitline pulldown circuitry. The dummy wordline tracking circuitry may have one or more variable capacitors that are coupled between the dummy wordline and a variable voltage source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.