Low power error correcting code (ECC) system
US10498362B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2016 |
| Grant date | Dec 3, 2019 |
| Priority date | — |
| Expiry date | Feb 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6511
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system for an Error Correction Code (“ECC”) decoder includes a first decoder and a second decoder. The first decoder is configured to determine a first estimated number of errors in encoded data received at the first decoder and to compare the first estimated number of errors to a first threshold and a second threshold. The second decoder is configured to receive the encoded data when the first estimated number of errors is below the first threshold and is above a second threshold. When the first estimated number of errors is above the first threshold, the first decoder passes the encoded data out of the ECC. The first decoder has a lower power consumption than the second decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.