Galois field pipelined multiplier with polynomial and beta input passing scheme
US10503477B2 · kind B2 · utility
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2References
13Claims
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Key dates
| Filing date | Dec 8, 2017 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Dec 8, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/1057
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The disclosure provides a very flexible mechanism for a storage controller to create RAID stripes and to re-create corrupted stripes when necessary using the erasure coding scheme. Typically, this is known as a RAID 6 implementation/feature. The erasure code calculations are generated using the Galois Multiplication hardware and the system controller can pass any polynomial into the hardware on a per stripe calculation basis. The polynomial value is passed to the hardware via an input descriptor field. The descriptor controls the entire computation process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.