Debugging method, multi-core processor, and debugging device
US10503629B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2018 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Mar 26, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/48
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention relate to the field of computer technologies. The embodiments of the present invention provide a debugging method, including: stopping running, by a core A of a multi-core processor, and sending a running stop signal to other cores in a process of stopping running; after receiving a first stop termination instruction and resuming running, executing a debugging information collection function and stopping running after completing the execution of the debugging information collection function; after receiving a second stop termination instruction and resuming running, sending a running resumption instruction to the other cores; and knocking a pending breakpoint in a process of running an operation object of the preset event, so as to enter a debugging state. According to the technical solutions provided in the embodiments of the present invention, kernel mode code and user mode code can be debugged on a same debugging platform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.