Associative computer providing semi-parallel architecture
US10503691B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Oct 26, 2016 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Jul 10, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7821
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An associative processor separates the arithmetic operation of addition from the carry process to pre-compute contingent carries before the addition which then allows improved parallelism in the addition process. A portion of the contingent carry computation may also be conducted in parallel. The result is higher-speed operations resulting from increased parallelism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.