Method of packaging a power amplifier module having a unified pattern and ceramic sidewall
US10504748B2 · kind B2 · utility
1Cited by
3References
4Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 15, 2015 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Sep 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/49827
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method of packaging a power amplifier module. The method of packaging a power amplifier module includes providing a unified pattern including a ceramic layer and a pattern formed on the ceramic layer, bonding the unified pattern on a metal layer, and depositing a ceramic sidewall, on which at least one external signal connection lead line is formed, on the unified pattern bonded the metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.