Semiconductor device having a bonding pad
US10504867B2 · kind B2 · utility
2Cited by
2References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 27, 2016 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Jun 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/29026
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a bonding pad and a wiring layer formed on an insulating film. The wiring layer is spaced from the bonding pad by a gap. A passivation film covers the bonding pad and the wiring layer and fills the gap. The gap has a width equal to or larger than the thickness of the passivation film, and equal to or smaller than twice a side wall thickness of the passivation film covering a side wall of the wiring layer. The semiconductor device has a high resistance to stress during bonding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.