Array substrate and method of manufacturing the same
US10504938B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 21, 2018 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Aug 21, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2202/104
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present application provides an array substrate and a method of manufacturing the same. The array substrate includes a first substrate having a drain electrode protruding from a side of the first substrate; a planarization layer at the side of the first substrate where the drain electrode protrudes, the planarization layer being provided with a stepped hole on the drain electrode, and a diameter of the stepped hole decreasing along a direction from a side of the planarization layer facing away the first substrate towards a side of the planarization layer facing the first substrate; a pixel electrode at the stepped hole and connected with the drain electrode; a passivation layer covering the planarization layer and the pixel electrode; and a common electrode on the passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.