Integration of silicon thin-film transistors and metal-oxide thin film transistors

US10504939B2 · kind B2 · utility

Assignee

• The Hong Kong University of Science and Technology

Inventors

• Lei Lu · Kowloon, CN
• Wei Zhou · Nanhu, CN
• Man Wong · Hong Kong, CN
• Hoi Sing Kwok · Kowloon, CN

Key dates

• Filing date: Feb 20, 2018
• Grant date: Dec 10, 2019
• Expiry date: Apr 5, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10K59/1213
• WIPO field: Optics
• WIPO sector: Instruments

Abstract

This disclosure relates generally to the three-dimensional (3D) integrated thin-film transistors (TFTs) with silicon and metal-oxide (MO) semiconductors as the active layers. In one or more embodiments, an apparatus is provided that comprises a first transistor comprising a silicon active layer, and a second transistor comprising a metal oxide active layer. The second transistor is vertically stacked on the first transistor, and the first transistor and the second transistor share a gate electrode formed between the silicon active layer and the metal oxide active layer. With these embodiments, the gate electrode corresponds to a top gate of the first transistor and a bottom gate of the second transistor.