Thin film transistor, method for manufacturing the same, array substrate and display device
US10504940B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 21, 2017 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Nov 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/021
Abstract
A thin film transistor comprises a gate, a gate insulating layer, an active layer, a source electrode and a drain electrode. The drain electrode comprises a first sub-drain electrode and at least one second sub-drain electrode. A first portion of the active layer between the first sub-drain electrode and the source electrode and a second portion of the active layer between each of the at least one second sub-drain electrode and the source electrode are used for forming different portions of a primary channel, respectively. The first sub-drain electrode is a signal input electrode, and a third portion of the active layer between the first sub-drain electrode and each of the at least one second sub-drain electrode is used for forming an auxiliary channel. A channel length of the auxiliary channel is less than or equal to a channel length of the primary channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.