Semiconductor device blocking leakage current and method of forming the same
US10505010B2 · kind B2 · utility
3Cited by
1References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 21, 2017 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Nov 21, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76897
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a gate assembly disposed on a device isolation layer, a gate spacer disposed on a side surface of the gate assembly, a contact assembly disposed on the gate spacer, an air gap disposed between the device isolation layer and the contact assembly, and a first spacer capping layer disposed between the gate spacer and the air gap. The first spacer capping layer has an etch selectivity with respect to the gate spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.