Semiconductor device
US10505546B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2018 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Oct 12, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided. The semiconductor device includes first and second logic cells adjacent to each other on a substrate, and a mixed separation structure extending in a first direction between the first and second logic cells. Each logic cell includes first and second active patterns that extend in a second direction intersecting the first direction and that are spaced apart from each other in the first direction, and gate electrodes extending in the first direction and spanning the first and second active patterns, and having a gate pitch. The mixed separation structure includes a first separation structure separating the first active pattern of the first logic cell from the first active pattern of the second logic cell; and a second separation structure on the first separation structure. A width of the first separation structure is greater than the gate pitch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.