Patent · US Active

Data uploading to asynchronous circuitry using circular buffer control

US10505704B1 · kind B1 · utility

0Cited by
8References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 1, 2016
Grant dateDec 10, 2019
Priority date
Expiry dateAug 1, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L49/90
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Disclosed embodiments provide an interface circuit for the transfer of data from a synchronous circuit to an asynchronous circuit. Data from the synchronous circuit is received into a memory in the interface circuit. The data in the memory is then sent to the asynchronous circuit based on an instruction in a circular buffer that is part of the interface circuit. Processing elements within the interface circuit execute instructions contained within the circular buffer. The circular buffer rotates to provide new instructions to the processing elements. Flow control paces the data from the synchronous circuit to the asynchronous circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.