Electrically conducting assemblies
US10506710B1 · kind B1 · utility
0Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2019 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Sep 10, 2039 |
Classification
- Technology area (CPC C)Chemistry; Metallurgy
- CPC primaryC08J2367/02
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention pertains to a process for the manufacture of a multilayer assembly comprising applying at least one patterned substrate onto at least one surface of at least one non-patterned substrate.The present invention also pertains to the multilayer assembly obtainable by said process and to uses of said multilayer assembly in various applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.