Display panel and display apparatus having the same
US10510306B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2018 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Dec 21, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0673
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel includes a plurality of gate lines extending in a first direction and including first and second gate lines adjacent to each other. A plurality of data lines extends in a second direction that crosses the first direction and includes first and second data lines adjacent to each other. A plurality of sub-pixels are arranged in a matrix configuration, each row of the matrix being disposed between two adjacent gate lines, from among the plurality of gate lines, each column of the matrix being disposed between two adjacent data lines, from among the plurality of data lines. The plurality of sub-pixels includes first column sub-pixels disposed on a first column of the matrix and connected to the first data line. Second column sub-pixels are disposed on a second column of the matrix and are connected to the second data line, the second column being adjacent to the first column. First row sub-pixels are disposed on a first row of the matrix and are alternately connected to the first and second gate lines in units of two sub-pixels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.