Array substrate and display device
US10510307B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2017 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Sep 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0465
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The embodiments of the present disclosure provide an array substrate. The array substrate includes a plurality of pixel groups arranged along a column direction. Each of the plurality of pixel groups includes a plurality of sub-pixel rows. Each sub-pixel row includes a plurality of sub-pixels, a first shelter or a second shelter is arranged between two adjacent sub-pixels, and the first shelter and the second shelter are arranged alternately. The first shelter has a first width, and the second shelter has a second width. For each pixel group, the first shelters on at least one of the sub-pixel rows are aligned with the second shelters on at least one of other sub-pixel rows.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.