Programming method, programming apparatus and storage medium for non-volatile memory
US10510426B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Apr 27, 2018 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Apr 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/683
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a programming method, programming apparatus and storage medium to reduce threshold voltage distribution in a non-volatile memory. The method includes performing program loops on a target page by sequentially using first programming voltages Vn; and when a predetermined condition is reached, proceeding to perform program loops on the target page by sequentially using second programming voltages Um until the target page is successfully programmed. Vn=V1+(n−1)×d1, where n denotes a program loop count of the first programming voltages, n is an integer greater than or equal to 1, and V1 and d1 are all positive numbers. Um=Vn+(m−1)×d2, where m denotes a program loop count of the second programming voltages, m is an integer greater than or equal to 2, and d2 is a positive number not equal to d1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.