Transient voltage suppression diodes with reduced harmonics, and methods of making and using
US10510741B2 · kind B2 · utility
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25Claims
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Key dates
| Filing date | Sep 29, 2017 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Sep 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/11
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor die. A transient voltage suppression (TVS) structure is formed in the semiconductor die. A capacitor is formed over the semiconductor die. In one embodiment, the capacitor is formed by depositing a first conductive layer over the semiconductor die, depositing an insulating layer over the first conductive layer, and depositing a second conductive layer over the semiconductor die. In another embodiment, the capacitor is formed by forming a trench in the semiconductor die, depositing an insulating material in the trench, and depositing a conductive material in the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.