TFT array substrate and manufacturing method thereof, display device
US10510783B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 4, 2017 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Jul 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/021
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A TFT array substrate, its manufacturing method and a corresponding display device are disclosed. The TFT array substrate, includes a bearing substrate, a gate line and a data line arranged across each other on the bearing substrate, a pixel region defined by the gate line and the data line, and a thin film transistor, a pixel electrode and an active layer disposed in the pixel region. Specifically, a gate of the thin film transistor is connected to the gate line, a source thereof is connected to the data line and a drain thereof is connected to the pixel electrode. Further, an insulating layer is also formed above the source of the thin film transistor, and a drain trench is formed in the insulating layer. In addition, the drain of the thin film transistor is in the drain trench and is connected to the source through the active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.