TSV interconnect structure and manufacturing method thereof
US10515892B2 · kind B2 · utility
2Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2013 |
| Grant date | Dec 24, 2019 |
| Priority date | — |
| Expiry date | Aug 26, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a through-substrate-via structure includes forming a via hole in a substrate, depositing a conductive material in the via hole, forming an annular groove in the substrate surrounding the conductive material, and depositing a dielectric material in the annular groove with overhang portions of the deposited dielectric material at a top surface of the groove forming an air gap in an interior portion of the groove.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.