Patent · US Active

Flash memories and methods for manufacturing the same

US10515971B2 · kind B2 · utility

2Cited by
0References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 11, 2017
Grant dateDec 24, 2019
Priority date
Expiry dateDec 11, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/035

Abstract

A method for manufacturing a flash memory includes forming a first conductive layer on a semiconductor substrate, and forming a patterned mask layer on the first conductive layer, wherein the first conductive layer is exposed by an opening of the patterned mask layer. The method also includes forming a second conductive layer on the patterned mask layer, wherein the second conductive layer extends into the opening. The method further includes performing a first etching process on the second conductive layer to form a spacer on a sidewall of the opening, and performing an oxidation process to form an oxide structure in the opening. In addition, the method includes performing a second etching process by using the oxide structure as a mask to form a floating gate, and forming a source region and a drain region in the semiconductor substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.