Semiconductor device, and manufacturing method for same
US10516017B2 · kind B2 · utility
0Cited by
0References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2017 |
| Grant date | Dec 24, 2019 |
| Priority date | — |
| Expiry date | Jun 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an emitter region, a base contact region, a buried region, and a carrier trap region. The emitter region and the base contact region are selectively disposed in the upper surface of the base region while being adjacent to each other. The buried region is disposed in the drift region below the base contact region or the emitter region. The carrier trap region is disposed between the buried region and the base region, and has a carrier lifetime shorter than that of the drift region. The device can improve latch-up breakdown tolerance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.