Space vector pulse width modulation method for suppressing common-mode voltage of multiphase motor
US10516361B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2018 |
| Grant date | Dec 24, 2019 |
| Priority date | — |
| Expiry date | Jun 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/123
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A space vector pulse width modulation (SVPWM) method for suppressing a common-mode voltage of a multiphase motor includes the following steps: (1) dividing all basic vectors of the multiphase motor into q types, and selecting therefrom x types having equal common-mode voltage magnitude of which an absolute value is smallest; (2) for each type in the x types of basic vectors, structuring y classes of auxiliary vectors according to an optimization model; (3) synthesizing reference vectors by virtue of the auxiliary vectors to obtain functioning time of basic vectors functioning in each switching period; and (4) obtaining an optimal functioning sequence of the basic vectors functioning in each switching period with fewest switching operations of a converter as a purpose. The present invention may effectively suppress a magnitude and frequency of the common-mode voltage of the multiphase motor without increasing calculation complexity or reducing other performance indexes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.