Sampling rate synchronization between transmitters and receivers
US10516521B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2015 |
| Grant date | Dec 24, 2019 |
| Priority date | — |
| Expiry date | Jun 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/005
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided in which a wireless receiver can be configured to digitally synchronize a receive sampling rate to a transmit sampling rate, and may include a digital interpolator controlled by a timing control unit with a timing offset estimator. The timing control unit can be configured to calculate and output parameters to the digital interpolator. The digital interpolator can include a sample buffer followed by a fractional delay filter. Output parameters to the digital interpolator can include a fractional delay timing offset signal of the receiver relative to a transmitter timing signal and a buffer pointer control signal to control a position of the read pointer relative to a write pointer to compensate for subsample timing offset. The timing offset estimator can be configured to calculate and provide to the timing control unit a sampling period ratio control word and an instantaneous timing offset control word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.