Direct packet placement
US10516710B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2017 |
| Grant date | Dec 24, 2019 |
| Priority date | — |
| Expiry date | Dec 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/34
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Communication apparatus includes a host interface and a network interface, which receives at least first and second redundant packet streams, each including a sequence of data packets, which include headers containing respective packet sequence numbers and data payloads of a predefined, fixed size containing respective slices of the data segment. Redundant first and second copies of each slice are transmitted in respective packets in the first and second packet streams. Packet processing circuitry receives the data packets from the network interface, maps the data packets in both the first and second packet streams, using the packet sequence numbers, to respective addresses in a buffer, and writes the data payloads to the respective addresses via the host interface while eliminating redundant data so that the buffer contains exactly one copy of each slice of the data segment, ordered in accordance with the packet sequence numbers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.