Branch prediction based on coherence operations in processors
US10521236B2 · kind B2 · utility
2Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2018 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Mar 29, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3832
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a processor includes a branch prediction circuit and a plurality of processing engines. The branch prediction circuit is to: detect a coherence operation associated with a first memory address; identify a first branch instruction associated with the first memory address; and predict a direction for the identified branch instruction based on the detected coherence operation. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.