Computing in parallel processing environments
US10521357B1 · kind B1 · utility
6Cited by
7References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2017 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Dec 29, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.