Error concealment for a head-mountable device
US10521881B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2018 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Jul 2, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2027/014
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In various implementations, a method includes obtaining a first frame that is characterized by a first resolution associated with a first memory allocation. In some implementations, the method includes down-converting the first frame from the first resolution to a second resolution that is lower than the first resolution initially defining the first frame in order to produce a reference frame. In some implementations, the second resolution is associated with a second memory allocation that is less than a target memory allocation derived from the first memory allocation. In some implementations, the method includes storing the reference frame in a non-transitory memory. In some implementations, the method includes obtaining a second frame that is characterized by the first resolution. In some implementations, the method includes performing an error correction operation on the second frame based on the reference frame stored in the non-transitory memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.