Patent · US Active

Method of tuning components within an integracted circuit device

US10522458B2 · kind B2 · utility

0Cited by

9References

9Claims

0Family size

Assignee

NXP USA, Inc. · US

Inventors

Yi Yin · Munich, DE
Ziqiang Tong · Ottobrunn, DE

Key dates

Filing date	Dec 6, 2017
Grant date	Dec 31, 2019
Priority date	—
Expiry date	Mar 1, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH01L23/64
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method of tuning inductive and/or capacitive components within an integrated circuit device. The method comprises measuring bare-die mounted performance of such a component formed within a semiconductor die, determining a package distribution layer pattern for the at least one component for achieving a desired performance for the at least one component based at least partly on the measured bare-die mounted performance, and packaging the semiconductor die with the determined package distribution layer pattern for the at least one component.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.