Gate driver circuit, display device using gate driver circuit, and method of driving display device
US10522609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2018 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Aug 22, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver circuit, a display device, and a method of driving the display device are disclosed. The gate driver circuit includes a first transistor supplying a start signal to a Q node in response to a clock, a second transistor adjusting a gate voltage of the first transistor in response to the clock, a third transistor adjusting a gate voltage of the second transistor in response to the start signal, a fourth transistor changing a voltage of a QB node, a fifth transistor switching a current path between the first transistor and the Q node in response to a first line control signal, a sixth transistor supplying a gate-off voltage to an output node, a seventh transistor supplying a gate-on voltage to the output node, and an eighth transistor supplying a second line control signal to the QB node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.