Power transistor bias circuit
US10523104B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2019 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Jun 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/102
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A direct current-direct current (DC-DC) converter includes an upper transistor, a lower transistor, a first bias circuit and a second bias circuit. A first input end of the first bias circuit is coupled to a first voltage reference, a second input end of the first bias circuit is coupled to a power source (PVDD), and an output end of the first bias circuit is coupled to a gate of the upper transistor to provide a first bias voltage for the gate of the upper transistor. A first input end of the second bias circuit is coupled to a second voltage reference, a second input end of the second bias circuit is coupled to a power ground (PGND), and an output end of the second bias circuit is coupled to a gate of the lower transistor to provide a second bias voltage for the gate of the lower transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.