Semiconductor device
US10529799B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2017 |
| Grant date | Jan 7, 2020 |
| Priority date | — |
| Expiry date | Jun 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/661
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor substrate, and a semiconductor layer disposed on the semiconductor substrate. First and second pillar layers, of respective first and second conductivity types, are alternately provided in a direction in parallel with a main surface in an active region of the semiconductor layer and in a termination region. A pillar pitch in the termination region is set to be larger than a pillar pitch in the active region. A product of a width of one of the first pillar layers and effective impurity concentration of the first conductivity of the one of the first pillar layers is equal to a product of a width of one of the second pillar layers and effective impurity concentration of the second conductivity of the one of the second pillar layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.