Patent · US Active

Silicon-containing semiconductor structures, methods of making the same and devices including the same

US10529872B2 · kind B2 · utility

0Cited by
2References
7Claims
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Assignee

Inventors

Key dates

Filing dateMar 21, 2016
Grant dateJan 7, 2020
Priority date—
Expiry dateSep 19, 2036

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02P70/50
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor system includes a silicon substrate and a porous silicon region disposed on the silicon substrate. The porous silicon region is configured to passivate the surface of the silicon substrate via a field effect and to reduce reflection loss on the silicon substrate via an appropriate refractive index. The porous silicon region is manufactured by a stain etching process, which retrofits existing tools for junction isolation and Phosphorus Silicon Glass (PSG) etch in solar cell manufacturing. The retrofitted tools for junction isolation and PSG etch achieves multiple purposes in a single step, including etch-back, PSG etch, antireflection coating, and passivation of the front surface of the solar cell.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.