Vertical layered finite alphabet iterative decoding
US10530392B2 · kind B2 · utility
8Cited by
2References
60Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2018 |
| Grant date | Jan 7, 2020 |
| Priority date | — |
| Expiry date | Jul 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0054
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention presents a method and apparatus for vertical layered finite alphabet iterative decoding of low-density parity-check codes (LDPC) which operate on parity check matrices that consist of blocks of sub-matrices. The iterative decoding involves passing messages between variable nodes and check nodes of the Tanner graph that associated with one or more sub-matrices constitute decoding blocks, and the messages belong to a finite alphabet. Various embodiments for the method and apparatus of the invention are presented that can achieve very high throughputs with low hardware resource usage and power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.