Semiconductor device
US10535533B2 · kind B2 · utility
2Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2018 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Jan 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06541
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor may include a substrate including a cell array region and a TSV region, an insulation layer disposed on the substrate and having a recess region on the TSV region, a capacitor on the insulation layer of the cell array region, a dummy support pattern disposed on the insulation layer of the TSV region and overlapping the recess region, when viewed in plan, and a TSV electrode penetrating the dummy support pattern and the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.